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1. general description the 74hc2g86-q100; 74hct2g86-q100 is a dual 2-input exclusive-or gate. inputs include clamp diodes that enable the use of cu rrent limiting resistors to interface inputs to voltages in excess of v cc . this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? wide supply voltage range from 2.0 v to 6.0 v ? input levels: ? for 74hc2g86-q100: cmos level ? for 74hct2g86-q100: ttl level ? symmetrical output impedance ? high noise immunity ? low power dissipation ? balanced propagation delays ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? multiple package options 74hc2g86-q100; 74hct2g86-q100 dual 2-input exclusive-or gate rev. 1 ? 10 march 2014 product data sheet
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 2 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate 3. ordering information 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram table 1. ordering information type number package temperature range name description version 74hc2g86dp-q100 ? 40 ? c to +125 ? c tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 74hct2g86dp-q100 74HC2G86DC-Q100 ? 40 ? c to +125 ? c vssop8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 74hct2g86dc-q100 table 2. marking code type number marking code [1] 74hc2g86dp-q100 h86 74hct2g86dp-q100 t86 74HC2G86DC-Q100 h86 74hct2g86dc-q100 t86 fig 1. logic symbol fig 2. iec logic symbol 001aah760 1a 1b 1y 2a 2b 2y 001aah761 = 1 = 1 fig 3. logic diagram (one gate) mna040 y b a
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 3 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. fig 4. pin configuration sot505-2 (tssop8) and sot765-1 (vssop8) +&*4 +&7*4 $ 9 && % < < % *1' $ ddd table 3. pin description symbol pin description 1a, 2a 1, 5 data input 1b, 2b 2, 6 data input gnd 4 ground (0 v) 1y, 2y 7, 3 data output v cc 8 supply voltage table 4. function table [1] input output na nb ny ll l lh h hl h hh l
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 4 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate 8. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] for tssop8 package: above 55 ? c the value of p tot derates linearly with 2.5 mw/k. for vssop8 package: above 110 ? c the value of p tot derates linearly with 8 mw/k. 9. recommended operating conditions 10. static characteristics table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +7.0 v i ik input clamping current v i < ? 0.5 v or v i >v cc + 0.5 v [1] - ? 20 ma i ok output clamping current v o < ? 0.5 v or v o >v cc + 0.5 v [1] - ? 20 ma i o output current v o = ? 0.5 v to (v cc +0.5v) [1] -25ma i cc supply current [1] -50ma i gnd ground current [1] ? 50 - ma t stg storage temperature ? 65 +150 ? c p d dynamic power dissipation t amb = ? 40 ? c to +125 ?c [2] - 300 mw table 6. recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions 74hc2g86-q100 74hct2g86-q100 unit min typ max min typ max v cc supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 v v i input voltage 0 - v cc 0-v cc v v o output voltage 0 - v cc 0-v cc v t amb ambient temperature ? 40 +25 +125 ? 40 +25 +125 ?c ? t/ ? v input transition rise and fall rate v cc = 2.0 v - - 625 - - - ns/v v cc = 4.5 v - 1.67 139 - 1.67 139 ns/v v cc = 6.0 v - - 83 - - - ns/v table 7. static characteristics voltages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 ? c ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ max min max min max 74hc2g86-q100 v ih high-level input voltage v cc = 2.0 v 1.5 1.2 - 1.5 - 1.5 - v v cc = 4.5 v 3.15 2.4 - 3.15 - 3.15 - v v cc = 6.0 v 4.2 3.2 - 4.2 - 4.2 - v v il low-level input voltage v cc = 2.0 v - 0.8 0.5 - 0.5 - 0.5 v v cc = 4.5 v - 2.1 1.35 - 1.35 - 1.35 v v cc = 6.0 v - 2.8 1.8 - 1.8 - 1.8 v
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 5 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate v oh high-level output voltage v i = v ih or v il i o = ? 20 ? a; v cc = 2.0 v 1.9 2.0 - 1.9 - 1.9 - v i o = ? 20 ? a; v cc = 4.5 v 4.4 4.5 - 4.4 - 4.4 - v i o = ? 20 ? a; v cc = 6.0 v 5.9 6.0 - 5.9 - 5.9 - v i o = ? 4.0 ma; v cc = 4.5 v 4.18 4.32 - 4.13 - 3.7 - v i o = ? 5.2 ma; v cc = 6.0 v 5.68 5.81 - 5.63 - 5.2 - v v ol low-level output voltage v i = v ih or v il i o = 20 ? a; v cc = 2.0 v - 0 0.1 - 0.1 - 0.1 v i o = 20 ? a; v cc = 4.5 v - 0 0.1 - 0.1 - 0.1 v i o = 20 ? a; v cc = 6.0 v - 0 0.1 - 0.1 - 0.1 v i o = 4.0 ma; v cc = 4.5 v - 0.15 0.26 - 0.33 - 0.4 v i o = 5.2 ma; v cc = 6.0 v - 0.16 0.26 - 0.33 - 0.4 v i i input leakage current v i =v cc or gnd; v cc =6.0v -- ? 0.1 - ? 1.0 - ? 1.0 ? a i cc supply current v i =v cc or gnd; i o = 0 a; v cc = 6.0 v - - 1.0 - 10 - 20 ? a c i input capacitance -1.5- - - - - pf 74hct2g86-q100 v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 1.6 - 2.0 - 2.0 - v v il low-level input voltage v cc = 4.5 v to 5.5 v - 1.2 0.8 - 0.8 - 0.8 v v oh high-level output voltage v i = v ih or v il ; v cc = 4.5 v i o = ? 20 ? a 4.4 4.5 - 4.4 - 4.4 - v i o = ? 4.0 ma 4.18 4.32 - 4.13 - 3.7 - v v ol low-level output voltage v i = v ih or v il ; v cc = 4.5 v i o = 20 ? a - 0 0.1 - 0.1 - 0.1 v i o = 4.0 ma - 0.15 0.26 - 0.33 - 0.4 v i i input leakage current v i =v cc or gnd; v cc =5.5v -- ? 0.1 - ? 1.0 - ? 1.0 ? a i cc supply current v i =v cc or gnd; i o = 0 a; v cc = 5.5 v - - 1.0 - 10 - 20 ? a ? i cc additional supply current per input; v cc = 4.5 v to 5.5 v; v i =v cc ? 2.1 v; i o =0a - - 300 - 375 - 410 ? a c i input capacitance -1.5- - - - - pf table 7. static characteristics ?continued voltages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 ? c ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ max min max min max
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 6 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate 11. dynamic characteristics [1] t pd is the same as t plh and t phl . [2] t t is the same as t tlh and t thl . [3] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l ? v cc 2 ? f o ) = sum of the outputs. table 8. dynamic characteristics voltages are referenced to gnd (ground = 0 v); for test circuit, see figure 6 . symbol parameter conditions 25 ?c ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ max min max min max 74hc2g86-q100 t pd propagation delay na, nb to ny; see figure 5 [1] v cc = 2.0 v - 34 120 - 150 - 180 ns v cc = 4.5 v - 11 20 - 25 - 36 ns v cc = 6.0 v - 9.0 17 - 21 - 30 ns t t transition time ny; see figure 5 [2] v cc = 2.0 v - 18 75 - 95 - 110 ns v cc = 4.5 v - 6 15 - 19 - 22 ns v cc = 6.0 v 5 13 - 16 - 20 ns c pd power dissipation capacitance per buffer; c l =50pf;f i =1 mhz; v i =gndtov cc [3] -10- - - - - pf 74hct2g86-q100 t pd propagation delay na, nb to ny; see figure 5 [1] v cc = 4.5 v - 11 19 - 23 - 48 ns t t transition time ny; see figure 5 [2] v cc = 4.5 v - 6 15 - 19 - 22 ns c pd power dissipation capacitance per buffer; c l =50pf;f i =1 mhz; v i =gndtov cc [3] -9- - - - -pf
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 7 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate 12. waveforms measurement points are given in table 9 . v ol and v oh are typical output voltage levels that occur with the output load. fig 5. propagation delay data input (na, nb) to data output (ny) and transition time output (ny) 001aak020 na, nb input ny output t thl t tlh v m v i gnd v oh v ol v m v x v y t phl t plh table 9. measurement points type input output v m v m v x v y 74hc2g86-q100 0.5v cc 0.5v cc 0.1v cc 0.9v cc 74hct2g86-q100 1.3 v 1.3 v 0.1v cc 0.9v cc
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 8 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate test data is given in table 10 . definitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. s1 = test selection switch. fig 6. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aad983 dut v cc v cc v i v o r t r l s1 c l open g table 10. test data type input load s1 position v i t r , t f c l r l t phl , t plh 74hc2g86-q100 gnd to v cc ? 6 ns 50 pf 1 k ? open 74hct2g86-q100 gnd to 3 v ? 6 ns 50 pf 1 k ? open
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 9 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate 13. package outline fig 7. package outline sot505-2 (tssop8) unit a 1 a max. a 2 a 3 b p lh e l p wy v ce d (1) e (1) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.95 0.75 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.70 0.35 8 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.47 0.33 sot505-2 - - - 02-01-16 w m b p d z e 0.25 14 8 5 tssop8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 1.1 pin 1 index
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 10 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate fig 8. package outlin e sot765-1 (vssop8) unit a 1 a max. a 2 a 3 b p lh e l p wy v ce d (1) e (2) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.85 0.60 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.1 8 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.40 0.15 q 0.21 0.19 sot765-1 mo-187 02-06-07 w m b p d z e 0.12 14 8 5 vssop8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 1 pin 1 index
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 11 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate 14. abbreviations 15. revision history table 11. abbreviations acronym description cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mil military mm machine model ttl transistor-transistor logic table 12. revision history document id release date data sheet status change notice supersedes 74hc_hct2g86_q100 v.1 20140310 product data sheet - -
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 12 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 16.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 16.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qualified for use in automotive applications. unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74hc_hct2g86_q100 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights reserved. product data sheet rev. 1 ? 10 march 2014 13 of 14 nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 16.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74hc2g86-q100; 74hct2g86-q100 dual 2-input exc lusive-or gate ? nxp semiconductors n.v. 2014. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 10 march 2014 document identifier: 74hc_hct2g86_q100 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 4 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 12 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 16.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 16.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 17 contact information. . . . . . . . . . . . . . . . . . . . . 13 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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